1. Field of the Invention
The present invention relates to a solid-state image pickup device, a method of driving the solid-state image pickup device and an imaging apparatus.
2. Description of the Related Art
A solid-state image pickup device such as a charge coupled device (CCD) type image sensor or a complementary metal oxide semiconductor (CMOS) type image sensor has been widely used as an imaging pickup device mounted in a mobile terminal such as a mobile telephone, the device being formed as one chip or as a module, or an image input device (image pickup device) of an imaging apparatus such as a digital still camera or a digital video camera.
FIG. 1 is a circuit diagram showing the configuration example of a pixel portion of a general solid-state image pickup device. As shown in FIG. 1, a unit pixel 100 according to the present example includes a photoelectric converting element such as a photodiode 101 and four transistors including a transport transistor 102, a reset transistor 103, an amplifying transistor 104 and a selection transistor 105. These transistors 102 to 105 are, for example, n-channel type MOS transistors.
The transport transistor 102 is connected between the cathode electrode of the photodiode 101 and a floating diffusion (FD) portion 106 and the gate electrode of the transport transistor 102 is connected to a transport control line 111 supplied with a transport gate pulse TG. The drain electrode of the reset transistor 103 is connected to a power source Vdd, the source electrode thereof is connected to the FD portion 106, and the gate electrode thereof is connected to a reset control line 112 supplied a reset pulse RS.
The gate electrode of the amplifying transistor 104 is connected to the FD portion 106 and the source electrode thereof is connected to a signal line 121 in a source follower circuit configuration. One end of the signal line 121 is connected to a constant current source 122. The drain electrode of the selection transistor 105 is connected to the power source Vdd, the source electrode thereof is connected to the drain electrode of the amplifying transistor 104 and the gate electrode thereof is connected to a selection control line 113 supplied with a selection pulse SEL.
FIG. 2 is a cross-sectional view showing a cross-sectional structure of a pixel portion except the amplifying transistor 104 and the selection transistor 105.
N-type diffusion regions 132, 133 and 134 are formed in the surface layer of a p-type substrate 131. On the p-type substrate 131, a gate electrode 135 is formed between then-type diffusion region 132 and the n-type diffusion region 133 and a gate electrode 136 is formed between the n-type diffusion region 133 and the n-type diffusion region 134 through a gate oxide film (SiO2) (not shown).
In the correspondence between FIG. 1 and FIG. 2, the photodiode 101 is formed by the pn junction between the p-type substrate 131 and the n-type diffusion region 132. The transport transistor 102 is formed by the n-type diffusion region 132, the n-type diffusion region 133, and the gate electrode 135 interposed therebetween. The reset transistor 103 is formed by the n-type diffusion region 133, the n-type diffusion region 134 and the gate electrode 136 interposed therebetween.
The n-type diffusion region 133 becomes the FD portion 106 and is electrically connected to the gate electrode of the amplifying transistor 104. The power source potential Vdd is applied to the n-type diffusion region 134 which becomes the drain region of the reset transistor 103. The upper surface of the p-type substrate 131 except the photodiode 101 is covered with a light shielding layer 137.
Next, based on the cross-sectional view of FIG. 2, the circuit operation of the pixel 100 will be described with reference to the waveform diagram of FIG. 3.
As shown in FIG. 2, when light is irradiated to the photodiode 101, a pair of electron (−) and hole (+1) is induced depending on the intensity of the light (photoelectric conversion). In FIG. 3, the selection pulse SEL is applied to the gate electrode of the selection transistor 105 at a time T1 and at the same time the reset pulse RS is applied to the gate electrode of the reset transistor 103. As a result, the reset transistor 103 falls into a conductive state and the FD portion 106 is reset to the power source potential Vdd at a time T2.
When the FD portion 106 is reset, the potential of the FD portion 106 is output to the signal line 121 through the amplifying transistor 104 as a reset level Vn. This reset revel corresponds to an inherent noise component of the pixel 100. The reset pulse RS is in an active (“H” level) state only during a predetermined period (time T1 to T3). The FD portion 106 is maintained in a reset state even after the reset pulse RS transitions from the active state to an inactive (“L” level) state. The period when the FD portion 106 is in the reset state is referred to as a reset period.
Next, in a state that the selection signal SEL is in the active state, the transport gate pulse TG is applied to the gate electrode of the transport transistor 102 at a time T4. Then, the transport transistor 102 falls into the conductive state, and signal charge which is photoelectrically converted and stored in the photodiode 101 is transmitted to the FD portion 106. As a result, the potential of the FD portion 106 varies depending on the amount of the signal charge (time T4 to T5). The potential of the FD portion 106 at this time is output to the signal line 121 through the amplifying transistor 104 as a signal level Vs (signal read period). The difference RSI1 between the signal level Vs and the reset level Vn becomes an inherent pixel signal level without the noise component.
In general, when the image of a bright subject is picked up, the amount of the charge stored in the photodiode 101 in the reset period is larger than that of when the image of a dark subject is picked up. Thus, the level difference RSI1 on the signal line 121 increases.
(Generation Mechanism of Blackening Phenomenon)
However, the solid-state image pickup device configured above, particularly, when significantly strong light such as solar light enters the pixel 100, a phenomenon in which a brightest portion blackens, that is, a blackening phenomenon, occurs.
The generation mechanism of the blackening phenomenon will be described with reference to FIGS. 4 and 5. FIG. 4 is a schematic diagram showing a portion for generating the blackening phenomenon and has the substantially same structure as FIG. 2. FIG. 5 is a waveform diagram at the time of the blackening phenomenon.
In the reset period, similar to that of FIG. 2, the selection pulse SEL is applied to the gate electrode of the selection transistor 105 at a time T1′ and at the same time the reset pulse RS is applied to the gate electrode of the reset transistor 103. As a result, the reset transistor 103 falls into a conductive state and the FD portion 106 is reset to the power source potential Vdd at a time T2′. The potential of the FD portion 106 at the time of the reset is output to the signal line 121 through the amplifying transistor 104 as the reset level Vn.
However, as shown in FIG. 4, when significantly strong light such as solar light is irradiated to the photodiode 101, a large amount of pairs of electron (−) and hole (+) is induced in the pn junction formed by the p-type substrate 131 and the n-type diffusion region 132 compared with FIG. 2. As a result, excessive photoelectric-converted electrons flow out of the photodiode 101. Thus, even if the transport gate pulse is in the inactive state, the excessive electrons pass through the transport transistor 102 and reach the FD portion 106. Accordingly, the potential of the FD portion 106 decreases and, as a result, the potential of the signal line 121 decreases (time T2′ to T4′).
Similarly, in the signal read period, in a state that the selection signal SEL is in the active state, when the transport gate pulse TG is applied to the gate electrode of the transport transistor 102 at the time T4′, the transport transistor 102 falls into the conductive state and signal charge which is photoelectrically converted and stored in the photodiode 101 is transmitted to the FD portion 106. As a result, the potential of the FD portion 106 varies depending on the amount of the signal charge (time T4′ to T5′). The potential of the FD portion 106 at this time is output to the signal line 121 through the amplifying transistor 104 as the signal level Vs.
At this time, since the excessive electrons leak in the reset period, as can be seen from FIG. 5, the potential of the signal line 121 decreases compared with when applying the reset pulse RS. As a result, even if strong light is irradiated, the potential difference RSI2 in the signal read period decreases.
That is, as shown in FIG. 6, in general, the difference Vs−Vn between the signal level Vs of the signal read period and the reset level Vn of the reset period is output as the inherent pixel signal level, and, when incident light amount exceeds predetermined light amount B, the signal level Vs is saturated and a constant pixel signal level is output. When the incident light amount exceeds predetermined light amount C larger than the light amount B, the excessive electrons flow out of the photodiode 101 and thus the reset level Vn varies as described above. As a result, even if strong light is irradiated, the difference Vs−Vn decreases. Accordingly, in spite of a significantly bright subject, the blackening phenomenon occurs.
In order to avoid such a blackening phenomenon, there was provided a technology for detecting whether incident light is significantly strong or not depending on whether a signal level Vs is in a saturation area or a reset level Vn is in a varying area and correcting a process for obtaining a difference Vs−Vn based on the detected result (for example, see Patent Document 1).
Patent Document 1: JP-A-2004-248304
More specifically, as shown in FIG. 7, a switch 206 is provided in the signal line of a reset level Vn between an amplifier 204 for amplifying the reset level Vn and a signal level Vs which are respectively output from a pixel array portion 201 through an N memory 202 and S memory 203 and a differential amplifier 205 for obtaining the difference between the signal level Vs and the reset level Vn. When it is detected that the signal level Vs is equal to or larger than a predetermined level Va or the reset level Vn is a predetermined level Vb in a light level detection circuit 207, the switch 206 is turned off (opening) to stop the process for obtaining the difference in the differential amplifier 205 and a signal before the A/D conversion of an A/D conversion circuit 208 is corrected, thereby avoiding the blackening phenomenon.
Alternatively, as shown in FIG. 8, even if it is detected that the signal level Vs is equal to or larger than the predetermined level Va or the reset level Vn is the predetermined level Vb in the light level detection circuit 207, the process for obtaining the difference in the differential amplifier 205 is performed, the difference is converted into a digital signal in the A/D conversion circuit 208 and stored in a memory 209. At the time of detecting the above-described state by the light level detection circuit 207, when the difference signal is read from a memory 209, the difference signal is converted into a signal having a predetermined level (signal level Va) by a conversion circuit 210 or the digital data of the A/D conversion circuit 209 is converted into saturation data by the saturation detection signal of the light level detection circuit 207, thereby avoiding the blackening phenomenon.
However, in the former technology, in order to correct the signal before the A/D conversion of the A/D conversion circuit 208, a circuit for a correction signal such as a constant voltage circuit is necessary in addition to the light level detection circuit 207 and thus the size of the circuit increases as a circuit for avoiding the blackening phenomenon.
In the latter technology, in order to correct the value of the memory 209, since the conversion circuit 210 for inserting a correction signal into the memory 209 is necessary in addition to the light level detection circuit 207 and thus the size of the circuit increases as a circuit for avoiding the blackening phenomenon.